Yayınlar & Eserler

SCI, SSCI ve AHCI İndekslerine Giren Dergilerde Yayınlanan Makaleler

Hakemli Kongre / Sempozyum Bildiri Kitaplarında Yer Alan Yayınlar

Test Cost-Test Quality Modeling For Adaptive Test

2022 IEEE INTERNATIONAL CONFERENCE ON AUTOMATION, QUALITY AND TESTING, ROBOTICS (AQTR), Cluj-Napoca, Romanya, 19 - 21 Mayıs 2022, ss.1-6

Small Delay Defect Diagnosis through Failure Observation Ordering

PROCEEDING OF 2016 IEEE INTERNATIONAL CONFERENCE ON AUTOMATION, QUALITY AND TESTING, ROBOTICS (AQTR), Cluj-Napoca, Romanya, 19 - 21 Mayıs 2016, ss.67-72 identifier

Full Exploitation of Process Variation Space for Continuous Delivery of Optimal Delay Test Quality

18th Asia and South Pacific Design Automation Conference (ASP-DAC), Yokohama, Japonya, 22 - 25 Ocak 2013, ss.552-557 identifier identifier

Tracing the Best Test Mix through Multi-Variate Quality Tracking

IEEE 31st VLSI Test Symposium (VTS), California, Amerika Birleşik Devletleri, 29 Nisan - 02 Mayıs 2013 identifier identifier

Delay Test Resource Allocation and Scheduling for Multiple Frequency Domains

30th IEEE VLSI Test Symposium (VTS), Hawaii, Amerika Birleşik Devletleri, 23 - 25 Nisan 2012, ss.114-119 identifier identifier

Adaptive Test Optimization through Real Time Learning of Test Effectiveness

Design, Automation and Test in Europe Conference (DATE), Grenoble, Fransa, 14 - 18 Mart 2011, ss.1430-1435 identifier identifier

Adaptive Test Framework for Achieving Target Test Quality at Minimal Cost

20th Asian Test Symposium (ATS), New Delhi, Hindistan, 20 - 23 Kasım 2011, ss.323-328 identifier identifier

Delay Test Quality Maximization through Process-aware Selection of Test Set Size

IEEE International Conference on Computer Design, Amsterdam, Hollanda, 3 - 06 Ekim 2010, ss.390-395 identifier identifier

Test cost reduction through a reconfigurable scan architecture

35th International Test Conference, Charlottetown, Kanada, 26 - 28 Ekim 2004, ss.945-952 identifier identifier

Extending the applicability of parallel-serial scan designs

IEEE International Conference on Computer Design, San-Jose, Kostarika, 11 - 13 Ekim 2004, ss.200-203 identifier

CircularScan: A scan architecture for test cost reduction

Design, Automation and Test in Europe Conference and Exhibition (DATE 04), Paris, Fransa, 16 - 20 Şubat 2004, ss.1290-1295 identifier identifier

Design space exploration for aggressive test cost reduction in circular scan Architectures

International Conference on Computer Aided Design (ICCAD 2004), San-Jose, Kostarika, 7 - 11 Kasım 2004, ss.726-731 identifier

Fault dictionary size reduction through test response superposition

20th IEEE International Conference on Computer Design, Freiburg, Almanya, 16 - 18 Eylül 2002, ss.480-485 identifier

Metrikler

Yayın

17

Atıf (WoS)

85

H-İndeks (WoS)

4

Atıf (Scopus)

103

H-İndeks (Scopus)

5

Proje

2

Tez Danışmanlığı

4

Açık Erişim

1
BM Sürdürülebilir Kalkınma Amaçları